2022-04-23 04:59:50 -04:00
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// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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2021-02-05 03:58:02 -05:00
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#include <algorithm>
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2021-07-26 03:24:26 -04:00
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#include <functional>
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2021-02-06 02:47:53 -05:00
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#include <tuple>
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2021-02-05 03:58:02 -05:00
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#include <type_traits>
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2021-02-05 17:19:36 -05:00
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#include "common/bit_cast.h"
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#include "shader_recompiler/exception.h"
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2021-02-16 17:50:23 -05:00
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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2021-04-20 23:35:47 -04:00
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/ir_opt/passes.h"
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namespace Shader::Optimization {
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namespace {
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2021-02-06 02:47:53 -05:00
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// Metaprogramming stuff to get arguments information out of a lambda
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template <typename Func>
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struct LambdaTraits : LambdaTraits<decltype(&std::remove_reference_t<Func>::operator())> {};
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template <typename ReturnType, typename LambdaType, typename... Args>
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struct LambdaTraits<ReturnType (LambdaType::*)(Args...) const> {
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template <size_t I>
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using ArgType = std::tuple_element_t<I, std::tuple<Args...>>;
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static constexpr size_t NUM_ARGS{sizeof...(Args)};
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};
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template <typename T>
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[[nodiscard]] T Arg(const IR::Value& value) {
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if constexpr (std::is_same_v<T, bool>) {
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return value.U1();
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} else if constexpr (std::is_same_v<T, u32>) {
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return value.U32();
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} else if constexpr (std::is_same_v<T, s32>) {
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return static_cast<s32>(value.U32());
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} else if constexpr (std::is_same_v<T, f32>) {
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return value.F32();
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} else if constexpr (std::is_same_v<T, u64>) {
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return value.U64();
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}
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}
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2021-02-13 23:24:32 -05:00
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template <typename T, typename ImmFn>
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bool FoldCommutative(IR::Inst& inst, ImmFn&& imm_fn) {
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const IR::Value lhs{inst.Arg(0)};
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const IR::Value rhs{inst.Arg(1)};
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const bool is_lhs_immediate{lhs.IsImmediate()};
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const bool is_rhs_immediate{rhs.IsImmediate()};
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if (is_lhs_immediate && is_rhs_immediate) {
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const auto result{imm_fn(Arg<T>(lhs), Arg<T>(rhs))};
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inst.ReplaceUsesWith(IR::Value{result});
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return false;
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}
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if (is_lhs_immediate && !is_rhs_immediate) {
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IR::Inst* const rhs_inst{rhs.InstRecursive()};
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if (rhs_inst->GetOpcode() == inst.GetOpcode() && rhs_inst->Arg(1).IsImmediate()) {
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const auto combined{imm_fn(Arg<T>(lhs), Arg<T>(rhs_inst->Arg(1)))};
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inst.SetArg(0, rhs_inst->Arg(0));
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inst.SetArg(1, IR::Value{combined});
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} else {
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// Normalize
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inst.SetArg(0, rhs);
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inst.SetArg(1, lhs);
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}
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}
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if (!is_lhs_immediate && is_rhs_immediate) {
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const IR::Inst* const lhs_inst{lhs.InstRecursive()};
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if (lhs_inst->GetOpcode() == inst.GetOpcode() && lhs_inst->Arg(1).IsImmediate()) {
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const auto combined{imm_fn(Arg<T>(rhs), Arg<T>(lhs_inst->Arg(1)))};
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inst.SetArg(0, lhs_inst->Arg(0));
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inst.SetArg(1, IR::Value{combined});
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}
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}
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return true;
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}
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2021-02-16 02:10:22 -05:00
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template <typename Func>
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bool FoldWhenAllImmediates(IR::Inst& inst, Func&& func) {
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if (!inst.AreAllArgsImmediates() || inst.HasAssociatedPseudoOperation()) {
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return false;
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}
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using Indices = std::make_index_sequence<LambdaTraits<decltype(func)>::NUM_ARGS>;
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inst.ReplaceUsesWith(EvalImmediates(inst, func, Indices{}));
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return true;
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}
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2021-07-26 03:24:26 -04:00
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/// Return true when all values in a range are equal
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template <typename Range>
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bool AreEqual(const Range& range) {
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auto resolver{[](const auto& value) { return value.Resolve(); }};
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auto equal{[](const IR::Value& lhs, const IR::Value& rhs) {
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if (lhs == rhs) {
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return true;
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}
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// Not equal, but try to match if they read the same constant buffer
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if (!lhs.IsImmediate() && !rhs.IsImmediate() &&
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lhs.Inst()->GetOpcode() == IR::Opcode::GetCbufU32 &&
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rhs.Inst()->GetOpcode() == IR::Opcode::GetCbufU32 &&
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lhs.Inst()->Arg(0) == rhs.Inst()->Arg(0) && lhs.Inst()->Arg(1) == rhs.Inst()->Arg(1)) {
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return true;
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}
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return false;
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}};
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return std::ranges::adjacent_find(range, std::not_fn(equal), resolver) == std::end(range);
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}
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void FoldGetRegister(IR::Inst& inst) {
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if (inst.Arg(0).Reg() == IR::Reg::RZ) {
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inst.ReplaceUsesWith(IR::Value{u32{0}});
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}
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}
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void FoldGetPred(IR::Inst& inst) {
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if (inst.Arg(0).Pred() == IR::Pred::PT) {
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inst.ReplaceUsesWith(IR::Value{true});
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}
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}
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2021-07-26 03:24:26 -04:00
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/// Replaces the XMAD pattern generated by an integer FMA
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bool FoldXmadMultiplyAdd(IR::Block& block, IR::Inst& inst) {
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/*
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* We are looking for this specific pattern:
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* %6 = BitFieldUExtract %op_b, #0, #16
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* %7 = BitFieldUExtract %op_a', #16, #16
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* %8 = IMul32 %6, %7
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* %10 = BitFieldUExtract %op_a', #0, #16
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* %11 = BitFieldInsert %8, %10, #16, #16
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* %15 = BitFieldUExtract %op_b, #0, #16
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* %16 = BitFieldUExtract %op_a, #0, #16
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* %17 = IMul32 %15, %16
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* %18 = IAdd32 %17, %op_c
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* %22 = BitFieldUExtract %op_b, #16, #16
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* %23 = BitFieldUExtract %11, #16, #16
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* %24 = IMul32 %22, %23
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* %25 = ShiftLeftLogical32 %24, #16
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* %26 = ShiftLeftLogical32 %11, #16
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* %27 = IAdd32 %26, %18
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* %result = IAdd32 %25, %27
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*
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* And replace it with:
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* %temp = IMul32 %op_a, %op_b
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* %result = IAdd32 %temp, %op_c
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*
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* This optimization has been proven safe by Nvidia's compiler logic being reversed.
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* (If Nvidia generates this code from 'fma(a, b, c)', we can do the same in the reverse order.)
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*/
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const IR::Value zero{0u};
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const IR::Value sixteen{16u};
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IR::Inst* const _25{inst.Arg(0).TryInstRecursive()};
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IR::Inst* const _27{inst.Arg(1).TryInstRecursive()};
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if (!_25 || !_27) {
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return false;
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}
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if (_27->GetOpcode() != IR::Opcode::IAdd32) {
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return false;
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}
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if (_25->GetOpcode() != IR::Opcode::ShiftLeftLogical32 || _25->Arg(1) != sixteen) {
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return false;
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}
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IR::Inst* const _24{_25->Arg(0).TryInstRecursive()};
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if (!_24 || _24->GetOpcode() != IR::Opcode::IMul32) {
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return false;
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}
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IR::Inst* const _22{_24->Arg(0).TryInstRecursive()};
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IR::Inst* const _23{_24->Arg(1).TryInstRecursive()};
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if (!_22 || !_23) {
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return false;
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}
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if (_22->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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}
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if (_23->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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}
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if (_22->Arg(1) != sixteen || _22->Arg(2) != sixteen) {
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return false;
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}
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if (_23->Arg(1) != sixteen || _23->Arg(2) != sixteen) {
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return false;
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}
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IR::Inst* const _11{_23->Arg(0).TryInstRecursive()};
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if (!_11 || _11->GetOpcode() != IR::Opcode::BitFieldInsert) {
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return false;
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}
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if (_11->Arg(2) != sixteen || _11->Arg(3) != sixteen) {
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return false;
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}
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IR::Inst* const _8{_11->Arg(0).TryInstRecursive()};
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IR::Inst* const _10{_11->Arg(1).TryInstRecursive()};
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if (!_8 || !_10) {
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return false;
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}
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if (_8->GetOpcode() != IR::Opcode::IMul32) {
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return false;
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}
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if (_10->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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}
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IR::Inst* const _6{_8->Arg(0).TryInstRecursive()};
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IR::Inst* const _7{_8->Arg(1).TryInstRecursive()};
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if (!_6 || !_7) {
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return false;
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}
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if (_6->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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}
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if (_7->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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}
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if (_6->Arg(1) != zero || _6->Arg(2) != sixteen) {
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return false;
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}
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if (_7->Arg(1) != sixteen || _7->Arg(2) != sixteen) {
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return false;
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}
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IR::Inst* const _26{_27->Arg(0).TryInstRecursive()};
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IR::Inst* const _18{_27->Arg(1).TryInstRecursive()};
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if (!_26 || !_18) {
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return false;
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}
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if (_26->GetOpcode() != IR::Opcode::ShiftLeftLogical32 || _26->Arg(1) != sixteen) {
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return false;
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}
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if (_26->Arg(0).InstRecursive() != _11) {
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return false;
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}
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if (_18->GetOpcode() != IR::Opcode::IAdd32) {
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return false;
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}
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IR::Inst* const _17{_18->Arg(0).TryInstRecursive()};
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if (!_17 || _17->GetOpcode() != IR::Opcode::IMul32) {
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return false;
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}
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IR::Inst* const _15{_17->Arg(0).TryInstRecursive()};
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IR::Inst* const _16{_17->Arg(1).TryInstRecursive()};
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if (!_15 || !_16) {
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return false;
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}
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if (_15->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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}
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if (_16->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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}
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if (_15->Arg(1) != zero || _16->Arg(1) != zero || _10->Arg(1) != zero) {
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return false;
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}
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if (_15->Arg(2) != sixteen || _16->Arg(2) != sixteen || _10->Arg(2) != sixteen) {
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return false;
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}
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const std::array<IR::Value, 3> op_as{
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_7->Arg(0).Resolve(),
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_16->Arg(0).Resolve(),
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_10->Arg(0).Resolve(),
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};
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const std::array<IR::Value, 3> op_bs{
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_22->Arg(0).Resolve(),
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_6->Arg(0).Resolve(),
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_15->Arg(0).Resolve(),
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};
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const IR::U32 op_c{_18->Arg(1)};
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if (!AreEqual(op_as) || !AreEqual(op_bs)) {
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return false;
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}
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IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
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inst.ReplaceUsesWith(ir.IAdd(ir.IMul(IR::U32{op_as[0]}, IR::U32{op_bs[1]}), op_c));
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return true;
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}
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2021-02-16 17:50:23 -05:00
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/// Replaces the pattern generated by two XMAD multiplications
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bool FoldXmadMultiply(IR::Block& block, IR::Inst& inst) {
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/*
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* We are looking for this pattern:
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2021-02-19 16:10:18 -05:00
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* %rhs_bfe = BitFieldUExtract %factor_a, #0, #16
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* %rhs_mul = IMul32 %rhs_bfe, %factor_b
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* %lhs_bfe = BitFieldUExtract %factor_a, #16, #16
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* %rhs_mul = IMul32 %lhs_bfe, %factor_b
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* %lhs_shl = ShiftLeftLogical32 %rhs_mul, #16
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* %result = IAdd32 %lhs_shl, %rhs_mul
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2021-02-16 17:50:23 -05:00
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*
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* And replacing it with
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* %result = IMul32 %factor_a, %factor_b
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*
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* This optimization has been proven safe by LLVM and MSVC.
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*/
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2021-07-26 03:15:23 -04:00
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IR::Inst* const lhs_shl{inst.Arg(0).TryInstRecursive()};
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IR::Inst* const rhs_mul{inst.Arg(1).TryInstRecursive()};
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if (!lhs_shl || !rhs_mul) {
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2021-02-16 17:50:23 -05:00
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return false;
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}
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2021-04-05 22:25:22 -04:00
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if (lhs_shl->GetOpcode() != IR::Opcode::ShiftLeftLogical32 ||
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lhs_shl->Arg(1) != IR::Value{16U}) {
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2021-02-16 17:50:23 -05:00
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return false;
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}
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2021-07-26 03:15:23 -04:00
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IR::Inst* const lhs_mul{lhs_shl->Arg(0).TryInstRecursive()};
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if (!lhs_mul) {
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2021-02-16 17:50:23 -05:00
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return false;
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}
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2021-04-05 22:25:22 -04:00
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if (lhs_mul->GetOpcode() != IR::Opcode::IMul32 || rhs_mul->GetOpcode() != IR::Opcode::IMul32) {
|
2021-02-16 17:50:23 -05:00
|
|
|
return false;
|
|
|
|
}
|
2021-07-26 03:15:23 -04:00
|
|
|
const IR::U32 factor_b{lhs_mul->Arg(1)};
|
|
|
|
if (factor_b.Resolve() != rhs_mul->Arg(1).Resolve()) {
|
2021-02-16 17:50:23 -05:00
|
|
|
return false;
|
|
|
|
}
|
2021-07-26 03:15:23 -04:00
|
|
|
IR::Inst* const lhs_bfe{lhs_mul->Arg(0).TryInstRecursive()};
|
|
|
|
IR::Inst* const rhs_bfe{rhs_mul->Arg(0).TryInstRecursive()};
|
|
|
|
if (!lhs_bfe || !rhs_bfe) {
|
2021-02-16 17:50:23 -05:00
|
|
|
return false;
|
|
|
|
}
|
2021-04-05 22:25:22 -04:00
|
|
|
if (lhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract) {
|
2021-02-16 17:50:23 -05:00
|
|
|
return false;
|
|
|
|
}
|
2021-04-05 22:25:22 -04:00
|
|
|
if (rhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract) {
|
2021-02-16 17:50:23 -05:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
if (lhs_bfe->Arg(1) != IR::Value{16U} || lhs_bfe->Arg(2) != IR::Value{16U}) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
if (rhs_bfe->Arg(1) != IR::Value{0U} || rhs_bfe->Arg(2) != IR::Value{16U}) {
|
|
|
|
return false;
|
|
|
|
}
|
2021-07-26 03:15:23 -04:00
|
|
|
const IR::U32 factor_a{lhs_bfe->Arg(0)};
|
|
|
|
if (factor_a.Resolve() != rhs_bfe->Arg(0).Resolve()) {
|
2021-02-16 17:50:23 -05:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
|
|
|
inst.ReplaceUsesWith(ir.IMul(factor_a, factor_b));
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-02-05 03:58:02 -05:00
|
|
|
template <typename T>
|
2021-02-16 17:50:23 -05:00
|
|
|
void FoldAdd(IR::Block& block, IR::Inst& inst) {
|
2021-02-05 03:58:02 -05:00
|
|
|
if (inst.HasAssociatedPseudoOperation()) {
|
|
|
|
return;
|
|
|
|
}
|
2021-02-13 23:24:32 -05:00
|
|
|
if (!FoldCommutative<T>(inst, [](T a, T b) { return a + b; })) {
|
2021-02-05 03:58:02 -05:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
const IR::Value rhs{inst.Arg(1)};
|
|
|
|
if (rhs.IsImmediate() && Arg<T>(rhs) == 0) {
|
|
|
|
inst.ReplaceUsesWith(inst.Arg(0));
|
2021-02-16 17:50:23 -05:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
if constexpr (std::is_same_v<T, u32>) {
|
|
|
|
if (FoldXmadMultiply(block, inst)) {
|
|
|
|
return;
|
|
|
|
}
|
2021-07-26 03:24:26 -04:00
|
|
|
if (FoldXmadMultiplyAdd(block, inst)) {
|
|
|
|
return;
|
|
|
|
}
|
2021-02-05 03:58:02 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-16 02:10:22 -05:00
|
|
|
void FoldISub32(IR::Inst& inst) {
|
|
|
|
if (FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a - b; })) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (inst.Arg(0).IsImmediate() || inst.Arg(1).IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
// ISub32 is generally used to subtract two constant buffers, compare and replace this with
|
|
|
|
// zero if they equal.
|
|
|
|
const auto equal_cbuf{[](IR::Inst* a, IR::Inst* b) {
|
2021-04-05 22:25:22 -04:00
|
|
|
return a->GetOpcode() == IR::Opcode::GetCbufU32 &&
|
|
|
|
b->GetOpcode() == IR::Opcode::GetCbufU32 && a->Arg(0) == b->Arg(0) &&
|
|
|
|
a->Arg(1) == b->Arg(1);
|
2021-02-16 02:10:22 -05:00
|
|
|
}};
|
|
|
|
IR::Inst* op_a{inst.Arg(0).InstRecursive()};
|
|
|
|
IR::Inst* op_b{inst.Arg(1).InstRecursive()};
|
|
|
|
if (equal_cbuf(op_a, op_b)) {
|
|
|
|
inst.ReplaceUsesWith(IR::Value{u32{0}});
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
// It's also possible a value is being added to a cbuf and then subtracted
|
2021-04-05 22:25:22 -04:00
|
|
|
if (op_b->GetOpcode() == IR::Opcode::IAdd32) {
|
2021-02-16 02:10:22 -05:00
|
|
|
// Canonicalize local variables to simplify the following logic
|
|
|
|
std::swap(op_a, op_b);
|
|
|
|
}
|
2021-04-05 22:25:22 -04:00
|
|
|
if (op_b->GetOpcode() != IR::Opcode::GetCbufU32) {
|
2021-02-16 02:10:22 -05:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const inst_cbuf{op_b};
|
2021-04-05 22:25:22 -04:00
|
|
|
if (op_a->GetOpcode() != IR::Opcode::IAdd32) {
|
2021-02-16 02:10:22 -05:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Value add_op_a{op_a->Arg(0)};
|
|
|
|
IR::Value add_op_b{op_a->Arg(1)};
|
|
|
|
if (add_op_b.IsImmediate()) {
|
|
|
|
// Canonicalize
|
|
|
|
std::swap(add_op_a, add_op_b);
|
|
|
|
}
|
|
|
|
if (add_op_b.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const add_cbuf{add_op_b.InstRecursive()};
|
|
|
|
if (equal_cbuf(add_cbuf, inst_cbuf)) {
|
|
|
|
inst.ReplaceUsesWith(add_op_a);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-06 02:47:53 -05:00
|
|
|
void FoldSelect(IR::Inst& inst) {
|
|
|
|
const IR::Value cond{inst.Arg(0)};
|
|
|
|
if (cond.IsImmediate()) {
|
|
|
|
inst.ReplaceUsesWith(cond.U1() ? inst.Arg(1) : inst.Arg(2));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-21 20:56:27 -04:00
|
|
|
void FoldFPMul32(IR::Inst& inst) {
|
|
|
|
const auto control{inst.Flags<IR::FpControl>()};
|
|
|
|
if (control.no_contraction) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
// Fold interpolation operations
|
|
|
|
const IR::Value lhs_value{inst.Arg(0)};
|
|
|
|
const IR::Value rhs_value{inst.Arg(1)};
|
|
|
|
if (lhs_value.IsImmediate() || rhs_value.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const lhs_op{lhs_value.InstRecursive()};
|
|
|
|
IR::Inst* const rhs_op{rhs_value.InstRecursive()};
|
2021-04-05 22:25:22 -04:00
|
|
|
if (lhs_op->GetOpcode() != IR::Opcode::FPMul32 ||
|
|
|
|
rhs_op->GetOpcode() != IR::Opcode::FPRecip32) {
|
2021-03-21 20:56:27 -04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
const IR::Value recip_source{rhs_op->Arg(0)};
|
|
|
|
const IR::Value lhs_mul_source{lhs_op->Arg(1).Resolve()};
|
|
|
|
if (recip_source.IsImmediate() || lhs_mul_source.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const attr_a{recip_source.InstRecursive()};
|
|
|
|
IR::Inst* const attr_b{lhs_mul_source.InstRecursive()};
|
2021-04-05 22:25:22 -04:00
|
|
|
if (attr_a->GetOpcode() != IR::Opcode::GetAttribute ||
|
|
|
|
attr_b->GetOpcode() != IR::Opcode::GetAttribute) {
|
2021-03-21 20:56:27 -04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (attr_a->Arg(0).Attribute() == attr_b->Arg(0).Attribute()) {
|
|
|
|
inst.ReplaceUsesWith(lhs_op->Arg(0));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-05 03:58:02 -05:00
|
|
|
void FoldLogicalAnd(IR::Inst& inst) {
|
2021-02-13 23:24:32 -05:00
|
|
|
if (!FoldCommutative<bool>(inst, [](bool a, bool b) { return a && b; })) {
|
2021-02-05 03:58:02 -05:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
const IR::Value rhs{inst.Arg(1)};
|
|
|
|
if (rhs.IsImmediate()) {
|
|
|
|
if (rhs.U1()) {
|
|
|
|
inst.ReplaceUsesWith(inst.Arg(0));
|
|
|
|
} else {
|
|
|
|
inst.ReplaceUsesWith(IR::Value{false});
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-11 14:39:06 -05:00
|
|
|
void FoldLogicalOr(IR::Inst& inst) {
|
2021-02-13 23:24:32 -05:00
|
|
|
if (!FoldCommutative<bool>(inst, [](bool a, bool b) { return a || b; })) {
|
2021-02-11 14:39:06 -05:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
const IR::Value rhs{inst.Arg(1)};
|
|
|
|
if (rhs.IsImmediate()) {
|
|
|
|
if (rhs.U1()) {
|
|
|
|
inst.ReplaceUsesWith(IR::Value{true});
|
|
|
|
} else {
|
|
|
|
inst.ReplaceUsesWith(inst.Arg(0));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void FoldLogicalNot(IR::Inst& inst) {
|
|
|
|
const IR::U1 value{inst.Arg(0)};
|
|
|
|
if (value.IsImmediate()) {
|
|
|
|
inst.ReplaceUsesWith(IR::Value{!value.U1()});
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const arg{value.InstRecursive()};
|
2021-04-05 22:25:22 -04:00
|
|
|
if (arg->GetOpcode() == IR::Opcode::LogicalNot) {
|
2021-02-11 14:39:06 -05:00
|
|
|
inst.ReplaceUsesWith(arg->Arg(0));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-09 15:14:57 -05:00
|
|
|
template <IR::Opcode op, typename Dest, typename Source>
|
2021-02-05 17:19:36 -05:00
|
|
|
void FoldBitCast(IR::Inst& inst, IR::Opcode reverse) {
|
|
|
|
const IR::Value value{inst.Arg(0)};
|
|
|
|
if (value.IsImmediate()) {
|
|
|
|
inst.ReplaceUsesWith(IR::Value{Common::BitCast<Dest>(Arg<Source>(value))});
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const arg_inst{value.InstRecursive()};
|
2021-04-05 22:25:22 -04:00
|
|
|
if (arg_inst->GetOpcode() == reverse) {
|
2021-02-05 17:19:36 -05:00
|
|
|
inst.ReplaceUsesWith(arg_inst->Arg(0));
|
2021-03-09 15:14:57 -05:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
if constexpr (op == IR::Opcode::BitCastF32U32) {
|
2021-04-05 22:25:22 -04:00
|
|
|
if (arg_inst->GetOpcode() == IR::Opcode::GetCbufU32) {
|
2021-03-09 15:14:57 -05:00
|
|
|
// Replace the bitcast with a typed constant buffer read
|
|
|
|
inst.ReplaceOpcode(IR::Opcode::GetCbufF32);
|
|
|
|
inst.SetArg(0, arg_inst->Arg(0));
|
|
|
|
inst.SetArg(1, arg_inst->Arg(1));
|
|
|
|
return;
|
|
|
|
}
|
2021-02-05 17:19:36 -05:00
|
|
|
}
|
2021-12-24 20:00:28 -05:00
|
|
|
if constexpr (op == IR::Opcode::BitCastU32F32) {
|
|
|
|
// Workaround for new NVIDIA driver bug, where:
|
|
|
|
// uint attr = ftou(itof(gl_InstanceID));
|
|
|
|
// always returned 0.
|
|
|
|
// We can instead manually optimize this and work around the driver bug:
|
|
|
|
// uint attr = uint(gl_InstanceID);
|
|
|
|
if (arg_inst->GetOpcode() == IR::Opcode::GetAttribute) {
|
|
|
|
const IR::Attribute attr{arg_inst->Arg(0).Attribute()};
|
|
|
|
switch (attr) {
|
|
|
|
case IR::Attribute::PrimitiveId:
|
|
|
|
case IR::Attribute::InstanceId:
|
|
|
|
case IR::Attribute::VertexId:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
// Replace the bitcasts with an integer attribute get
|
|
|
|
inst.ReplaceOpcode(IR::Opcode::GetAttributeU32);
|
|
|
|
inst.SetArg(0, arg_inst->Arg(0));
|
|
|
|
inst.SetArg(1, arg_inst->Arg(1));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2021-02-05 17:19:36 -05:00
|
|
|
}
|
|
|
|
|
2021-04-01 00:39:47 -04:00
|
|
|
void FoldInverseFunc(IR::Inst& inst, IR::Opcode reverse) {
|
|
|
|
const IR::Value value{inst.Arg(0)};
|
|
|
|
if (value.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const arg_inst{value.InstRecursive()};
|
2021-04-05 22:25:22 -04:00
|
|
|
if (arg_inst->GetOpcode() == reverse) {
|
2021-04-01 00:39:47 -04:00
|
|
|
inst.ReplaceUsesWith(arg_inst->Arg(0));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-06 02:47:53 -05:00
|
|
|
template <typename Func, size_t... I>
|
|
|
|
IR::Value EvalImmediates(const IR::Inst& inst, Func&& func, std::index_sequence<I...>) {
|
|
|
|
using Traits = LambdaTraits<decltype(func)>;
|
2021-04-05 22:25:22 -04:00
|
|
|
return IR::Value{func(Arg<typename Traits::template ArgType<I>>(inst.Arg(I))...)};
|
2021-02-06 02:47:53 -05:00
|
|
|
}
|
|
|
|
|
2021-04-01 01:42:58 -04:00
|
|
|
std::optional<IR::Value> FoldCompositeExtractImpl(IR::Value inst_value, IR::Opcode insert,
|
|
|
|
IR::Opcode construct, u32 first_index) {
|
|
|
|
IR::Inst* const inst{inst_value.InstRecursive()};
|
2021-04-05 22:25:22 -04:00
|
|
|
if (inst->GetOpcode() == construct) {
|
2021-04-01 01:42:58 -04:00
|
|
|
return inst->Arg(first_index);
|
|
|
|
}
|
2021-04-05 22:25:22 -04:00
|
|
|
if (inst->GetOpcode() != insert) {
|
2021-04-01 01:42:58 -04:00
|
|
|
return std::nullopt;
|
|
|
|
}
|
|
|
|
IR::Value value_index{inst->Arg(2)};
|
|
|
|
if (!value_index.IsImmediate()) {
|
|
|
|
return std::nullopt;
|
|
|
|
}
|
2021-04-02 19:48:39 -04:00
|
|
|
const u32 second_index{value_index.U32()};
|
2021-04-01 01:42:58 -04:00
|
|
|
if (first_index != second_index) {
|
|
|
|
IR::Value value_composite{inst->Arg(0)};
|
|
|
|
if (value_composite.IsImmediate()) {
|
|
|
|
return std::nullopt;
|
|
|
|
}
|
|
|
|
return FoldCompositeExtractImpl(value_composite, insert, construct, first_index);
|
|
|
|
}
|
|
|
|
return inst->Arg(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
void FoldCompositeExtract(IR::Inst& inst, IR::Opcode construct, IR::Opcode insert) {
|
|
|
|
const IR::Value value_1{inst.Arg(0)};
|
|
|
|
const IR::Value value_2{inst.Arg(1)};
|
|
|
|
if (value_1.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (!value_2.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
2021-04-02 19:48:39 -04:00
|
|
|
const u32 first_index{value_2.U32()};
|
|
|
|
const std::optional result{FoldCompositeExtractImpl(value_1, insert, construct, first_index)};
|
2021-04-01 01:42:58 -04:00
|
|
|
if (!result) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
inst.ReplaceUsesWith(*result);
|
|
|
|
}
|
|
|
|
|
2021-04-17 05:56:45 -04:00
|
|
|
IR::Value GetThroughCast(IR::Value value, IR::Opcode expected_cast) {
|
|
|
|
if (value.IsImmediate()) {
|
|
|
|
return value;
|
|
|
|
}
|
|
|
|
IR::Inst* const inst{value.InstRecursive()};
|
|
|
|
if (inst->GetOpcode() == expected_cast) {
|
|
|
|
return inst->Arg(0).Resolve();
|
|
|
|
}
|
|
|
|
return value;
|
|
|
|
}
|
|
|
|
|
|
|
|
void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
|
|
|
|
const IR::Value swizzle{inst.Arg(2)};
|
|
|
|
if (!swizzle.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
const IR::Value value_1{GetThroughCast(inst.Arg(0).Resolve(), IR::Opcode::BitCastF32U32)};
|
|
|
|
const IR::Value value_2{GetThroughCast(inst.Arg(1).Resolve(), IR::Opcode::BitCastF32U32)};
|
|
|
|
if (value_1.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
const u32 swizzle_value{swizzle.U32()};
|
|
|
|
if (swizzle_value != 0x99 && swizzle_value != 0xA5) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
IR::Inst* const inst2{value_1.InstRecursive()};
|
|
|
|
if (inst2->GetOpcode() != IR::Opcode::ShuffleButterfly) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
const IR::Value value_3{GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32)};
|
|
|
|
if (value_2 != value_3) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
const IR::Value index{inst2->Arg(1)};
|
|
|
|
const IR::Value clamp{inst2->Arg(2)};
|
|
|
|
const IR::Value segmentation_mask{inst2->Arg(3)};
|
|
|
|
if (!index.IsImmediate() || !clamp.IsImmediate() || !segmentation_mask.IsImmediate()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (clamp.U32() != 3 || segmentation_mask.U32() != 28) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (swizzle_value == 0x99) {
|
|
|
|
// DPdxFine
|
|
|
|
if (index.U32() == 1) {
|
|
|
|
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
2021-05-27 18:04:26 -04:00
|
|
|
inst.ReplaceUsesWith(ir.DPdxFine(IR::F32{inst.Arg(1)}));
|
2021-04-17 05:56:45 -04:00
|
|
|
}
|
|
|
|
} else if (swizzle_value == 0xA5) {
|
|
|
|
// DPdyFine
|
|
|
|
if (index.U32() == 2) {
|
|
|
|
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
2021-05-27 18:04:26 -04:00
|
|
|
inst.ReplaceUsesWith(ir.DPdyFine(IR::F32{inst.Arg(1)}));
|
2021-04-17 05:56:45 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-16 17:50:23 -05:00
|
|
|
void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
2021-04-05 22:25:22 -04:00
|
|
|
switch (inst.GetOpcode()) {
|
2021-02-05 03:58:02 -05:00
|
|
|
case IR::Opcode::GetRegister:
|
|
|
|
return FoldGetRegister(inst);
|
|
|
|
case IR::Opcode::GetPred:
|
|
|
|
return FoldGetPred(inst);
|
|
|
|
case IR::Opcode::IAdd32:
|
2021-02-16 17:50:23 -05:00
|
|
|
return FoldAdd<u32>(block, inst);
|
2021-02-16 02:10:22 -05:00
|
|
|
case IR::Opcode::ISub32:
|
|
|
|
return FoldISub32(inst);
|
2021-04-12 18:41:53 -04:00
|
|
|
case IR::Opcode::IMul32:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a * b; });
|
|
|
|
return;
|
2021-04-19 15:36:57 -04:00
|
|
|
case IR::Opcode::ShiftRightArithmetic32:
|
|
|
|
FoldWhenAllImmediates(inst, [](s32 a, s32 b) { return static_cast<u32>(a >> b); });
|
|
|
|
return;
|
2021-02-05 17:19:36 -05:00
|
|
|
case IR::Opcode::BitCastF32U32:
|
2021-03-09 15:14:57 -05:00
|
|
|
return FoldBitCast<IR::Opcode::BitCastF32U32, f32, u32>(inst, IR::Opcode::BitCastU32F32);
|
2021-02-05 17:19:36 -05:00
|
|
|
case IR::Opcode::BitCastU32F32:
|
2021-03-09 15:14:57 -05:00
|
|
|
return FoldBitCast<IR::Opcode::BitCastU32F32, u32, f32>(inst, IR::Opcode::BitCastF32U32);
|
2021-02-05 03:58:02 -05:00
|
|
|
case IR::Opcode::IAdd64:
|
2021-02-16 17:50:23 -05:00
|
|
|
return FoldAdd<u64>(block, inst);
|
2021-04-01 00:39:47 -04:00
|
|
|
case IR::Opcode::PackHalf2x16:
|
|
|
|
return FoldInverseFunc(inst, IR::Opcode::UnpackHalf2x16);
|
|
|
|
case IR::Opcode::UnpackHalf2x16:
|
|
|
|
return FoldInverseFunc(inst, IR::Opcode::PackHalf2x16);
|
2021-07-29 20:22:22 -04:00
|
|
|
case IR::Opcode::PackFloat2x16:
|
|
|
|
return FoldInverseFunc(inst, IR::Opcode::UnpackFloat2x16);
|
|
|
|
case IR::Opcode::UnpackFloat2x16:
|
|
|
|
return FoldInverseFunc(inst, IR::Opcode::PackFloat2x16);
|
2021-03-21 19:28:37 -04:00
|
|
|
case IR::Opcode::SelectU1:
|
|
|
|
case IR::Opcode::SelectU8:
|
|
|
|
case IR::Opcode::SelectU16:
|
2021-02-22 20:59:16 -05:00
|
|
|
case IR::Opcode::SelectU32:
|
2021-03-21 19:28:37 -04:00
|
|
|
case IR::Opcode::SelectU64:
|
|
|
|
case IR::Opcode::SelectF16:
|
|
|
|
case IR::Opcode::SelectF32:
|
|
|
|
case IR::Opcode::SelectF64:
|
|
|
|
return FoldSelect(inst);
|
2021-03-21 20:56:27 -04:00
|
|
|
case IR::Opcode::FPMul32:
|
|
|
|
return FoldFPMul32(inst);
|
2021-02-05 03:58:02 -05:00
|
|
|
case IR::Opcode::LogicalAnd:
|
|
|
|
return FoldLogicalAnd(inst);
|
2021-02-11 14:39:06 -05:00
|
|
|
case IR::Opcode::LogicalOr:
|
|
|
|
return FoldLogicalOr(inst);
|
|
|
|
case IR::Opcode::LogicalNot:
|
|
|
|
return FoldLogicalNot(inst);
|
2021-02-13 23:24:32 -05:00
|
|
|
case IR::Opcode::SLessThan:
|
2021-02-16 02:10:22 -05:00
|
|
|
FoldWhenAllImmediates(inst, [](s32 a, s32 b) { return a < b; });
|
|
|
|
return;
|
2021-02-06 02:47:53 -05:00
|
|
|
case IR::Opcode::ULessThan:
|
2021-02-16 02:10:22 -05:00
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a < b; });
|
|
|
|
return;
|
2021-04-01 00:39:47 -04:00
|
|
|
case IR::Opcode::SLessThanEqual:
|
|
|
|
FoldWhenAllImmediates(inst, [](s32 a, s32 b) { return a <= b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::ULessThanEqual:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a <= b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::SGreaterThan:
|
|
|
|
FoldWhenAllImmediates(inst, [](s32 a, s32 b) { return a > b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::UGreaterThan:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a > b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::SGreaterThanEqual:
|
|
|
|
FoldWhenAllImmediates(inst, [](s32 a, s32 b) { return a >= b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::UGreaterThanEqual:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a >= b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::IEqual:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a == b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::INotEqual:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a != b; });
|
|
|
|
return;
|
2021-04-12 18:41:53 -04:00
|
|
|
case IR::Opcode::BitwiseAnd32:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a & b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::BitwiseOr32:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a | b; });
|
|
|
|
return;
|
|
|
|
case IR::Opcode::BitwiseXor32:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 a, u32 b) { return a ^ b; });
|
|
|
|
return;
|
2021-02-06 02:47:53 -05:00
|
|
|
case IR::Opcode::BitFieldUExtract:
|
2021-02-16 02:10:22 -05:00
|
|
|
FoldWhenAllImmediates(inst, [](u32 base, u32 shift, u32 count) {
|
2021-04-23 07:17:53 -04:00
|
|
|
if (static_cast<size_t>(shift) + static_cast<size_t>(count) > 32) {
|
2021-02-06 02:47:53 -05:00
|
|
|
throw LogicError("Undefined result in {}({}, {}, {})", IR::Opcode::BitFieldUExtract,
|
|
|
|
base, shift, count);
|
|
|
|
}
|
|
|
|
return (base >> shift) & ((1U << count) - 1);
|
|
|
|
});
|
2021-02-16 02:10:22 -05:00
|
|
|
return;
|
2021-03-24 18:41:55 -04:00
|
|
|
case IR::Opcode::BitFieldSExtract:
|
|
|
|
FoldWhenAllImmediates(inst, [](s32 base, u32 shift, u32 count) {
|
2021-03-26 15:46:07 -04:00
|
|
|
const size_t back_shift{static_cast<size_t>(shift) + static_cast<size_t>(count)};
|
2021-04-23 07:17:53 -04:00
|
|
|
const size_t left_shift{32 - back_shift};
|
|
|
|
const size_t right_shift{static_cast<size_t>(32 - count)};
|
2021-04-24 00:49:14 -04:00
|
|
|
if (back_shift > 32 || left_shift >= 32 || right_shift >= 32) {
|
2021-03-24 18:41:55 -04:00
|
|
|
throw LogicError("Undefined result in {}({}, {}, {})", IR::Opcode::BitFieldSExtract,
|
|
|
|
base, shift, count);
|
|
|
|
}
|
2021-04-23 07:17:53 -04:00
|
|
|
return static_cast<u32>((base << left_shift) >> right_shift);
|
|
|
|
});
|
|
|
|
return;
|
|
|
|
case IR::Opcode::BitFieldInsert:
|
|
|
|
FoldWhenAllImmediates(inst, [](u32 base, u32 insert, u32 offset, u32 bits) {
|
|
|
|
if (bits >= 32 || offset >= 32) {
|
|
|
|
throw LogicError("Undefined result in {}({}, {}, {}, {})",
|
|
|
|
IR::Opcode::BitFieldInsert, base, insert, offset, bits);
|
|
|
|
}
|
|
|
|
return (base & ~(~(~0u << bits) << offset)) | (insert << offset);
|
2021-03-24 18:41:55 -04:00
|
|
|
});
|
|
|
|
return;
|
2021-06-23 00:32:09 -04:00
|
|
|
case IR::Opcode::CompositeExtractU32x2:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructU32x2,
|
|
|
|
IR::Opcode::CompositeInsertU32x2);
|
|
|
|
case IR::Opcode::CompositeExtractU32x3:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructU32x3,
|
|
|
|
IR::Opcode::CompositeInsertU32x3);
|
|
|
|
case IR::Opcode::CompositeExtractU32x4:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructU32x4,
|
|
|
|
IR::Opcode::CompositeInsertU32x4);
|
2021-04-01 01:42:58 -04:00
|
|
|
case IR::Opcode::CompositeExtractF32x2:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructF32x2,
|
|
|
|
IR::Opcode::CompositeInsertF32x2);
|
|
|
|
case IR::Opcode::CompositeExtractF32x3:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructF32x3,
|
|
|
|
IR::Opcode::CompositeInsertF32x3);
|
|
|
|
case IR::Opcode::CompositeExtractF32x4:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructF32x4,
|
|
|
|
IR::Opcode::CompositeInsertF32x4);
|
|
|
|
case IR::Opcode::CompositeExtractF16x2:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructF16x2,
|
|
|
|
IR::Opcode::CompositeInsertF16x2);
|
|
|
|
case IR::Opcode::CompositeExtractF16x3:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructF16x3,
|
|
|
|
IR::Opcode::CompositeInsertF16x3);
|
|
|
|
case IR::Opcode::CompositeExtractF16x4:
|
|
|
|
return FoldCompositeExtract(inst, IR::Opcode::CompositeConstructF16x4,
|
|
|
|
IR::Opcode::CompositeInsertF16x4);
|
2021-04-17 05:56:45 -04:00
|
|
|
case IR::Opcode::FSwizzleAdd:
|
|
|
|
return FoldFSwizzleAdd(block, inst);
|
2021-02-05 03:58:02 -05:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} // Anonymous namespace
|
|
|
|
|
2021-03-14 01:41:05 -05:00
|
|
|
void ConstantPropagationPass(IR::Program& program) {
|
2021-07-12 04:22:01 -04:00
|
|
|
const auto end{program.post_order_blocks.rend()};
|
|
|
|
for (auto it = program.post_order_blocks.rbegin(); it != end; ++it) {
|
|
|
|
IR::Block* const block{*it};
|
2021-03-14 01:41:05 -05:00
|
|
|
for (IR::Inst& inst : block->Instructions()) {
|
|
|
|
ConstantPropagation(*block, inst);
|
|
|
|
}
|
2021-02-16 17:50:23 -05:00
|
|
|
}
|
2021-02-05 03:58:02 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
} // namespace Shader::Optimization
|