2019-03-02 15:20:28 -05:00
|
|
|
// Copyright 2019 yuzu Emulator Project
|
|
|
|
// Licensed under GPLv2 or any later version
|
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
|
|
|
#include "common/page_table.h"
|
|
|
|
|
|
|
|
namespace Common {
|
|
|
|
|
2020-04-08 22:49:51 -04:00
|
|
|
PageTable::PageTable() = default;
|
2019-03-02 15:20:28 -05:00
|
|
|
|
2020-11-17 19:58:41 -05:00
|
|
|
PageTable::~PageTable() noexcept = default;
|
2019-03-02 15:20:28 -05:00
|
|
|
|
core/memory: Read and write page table atomically
Squash attributes into the pointer's integer, making them an uintptr_t
pair containing 2 bits at the bottom and then the pointer. These bits
are currently unused thanks to alignment requirements.
Configure Dynarmic to mask out these bits on pointer reads.
While we are at it, remove some unused attributes carried over from
Citra.
Read/Write and other hot functions use a two step unpacking process that
is less readable to stop MSVC from emitting an extra AND instruction in
the hot path:
mov rdi,rcx
shr rdx,0Ch
mov r8,qword ptr [rax+8]
mov rax,qword ptr [r8+rdx*8]
mov rdx,rax
-and al,3
and rdx,0FFFFFFFFFFFFFFFCh
je Core::Memory::Memory::Impl::Read<unsigned char>
mov rax,qword ptr [vaddr]
movzx eax,byte ptr [rdx+rax]
2020-12-29 19:16:57 -05:00
|
|
|
void PageTable::Resize(size_t address_space_width_in_bits, size_t page_size_in_bits) {
|
|
|
|
const size_t num_page_table_entries{1ULL << (address_space_width_in_bits - page_size_in_bits)};
|
2019-03-02 15:20:28 -05:00
|
|
|
pointers.resize(num_page_table_entries);
|
2020-03-13 16:33:47 -04:00
|
|
|
backing_addr.resize(num_page_table_entries);
|
2019-03-02 15:20:28 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
} // namespace Common
|