2021-02-02 19:07:00 -05:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// This file implements the SSA rewriting algorithm proposed in
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//
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// Simple and Efficient Construction of Static Single Assignment Form.
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2021-07-09 16:11:47 -04:00
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// Braun M., Buchwald S., Hack S., Leiba R., Mallon C., Zwinkau A. (2013)
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2021-02-02 19:07:00 -05:00
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// In: Jhala R., De Bosschere K. (eds)
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// Compiler Construction. CC 2013.
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// Lecture Notes in Computer Science, vol 7791.
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// Springer, Berlin, Heidelberg
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//
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// https://link.springer.com/chapter/10.1007/978-3-642-37051-9_6
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//
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2021-02-14 18:15:42 -05:00
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#include <ranges>
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#include <span>
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#include <variant>
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#include <vector>
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#include <boost/container/flat_map.hpp>
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#include <boost/container/flat_set.hpp>
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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#include "shader_recompiler/frontend/ir/opcodes.h"
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#include "shader_recompiler/frontend/ir/pred.h"
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#include "shader_recompiler/frontend/ir/reg.h"
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#include "shader_recompiler/ir_opt/passes.h"
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namespace Shader::Optimization {
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namespace {
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struct FlagTag {
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auto operator<=>(const FlagTag&) const noexcept = default;
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};
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struct ZeroFlagTag : FlagTag {};
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struct SignFlagTag : FlagTag {};
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struct CarryFlagTag : FlagTag {};
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struct OverflowFlagTag : FlagTag {};
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2021-02-11 14:39:06 -05:00
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struct GotoVariable : FlagTag {
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GotoVariable() = default;
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explicit GotoVariable(u32 index_) : index{index_} {}
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auto operator<=>(const GotoVariable&) const noexcept = default;
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u32 index;
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};
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struct IndirectBranchVariable {
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auto operator<=>(const IndirectBranchVariable&) const noexcept = default;
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};
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using Variant = std::variant<IR::Reg, IR::Pred, ZeroFlagTag, SignFlagTag, CarryFlagTag,
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OverflowFlagTag, GotoVariable, IndirectBranchVariable>;
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using ValueMap = boost::container::flat_map<IR::Block*, IR::Value, std::less<IR::Block*>>;
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struct DefTable {
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[[nodiscard]] ValueMap& operator[](IR::Reg variable) noexcept {
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return regs[IR::RegIndex(variable)];
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}
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[[nodiscard]] ValueMap& operator[](IR::Pred variable) noexcept {
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return preds[IR::PredIndex(variable)];
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}
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[[nodiscard]] ValueMap& operator[](GotoVariable goto_variable) {
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return goto_vars[goto_variable.index];
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}
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[[nodiscard]] ValueMap& operator[](IndirectBranchVariable) {
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return indirect_branch_var;
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}
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[[nodiscard]] ValueMap& operator[](ZeroFlagTag) noexcept {
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return zero_flag;
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}
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[[nodiscard]] ValueMap& operator[](SignFlagTag) noexcept {
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return sign_flag;
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}
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[[nodiscard]] ValueMap& operator[](CarryFlagTag) noexcept {
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return carry_flag;
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}
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[[nodiscard]] ValueMap& operator[](OverflowFlagTag) noexcept {
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return overflow_flag;
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}
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std::array<ValueMap, IR::NUM_USER_REGS> regs;
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std::array<ValueMap, IR::NUM_USER_PREDS> preds;
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boost::container::flat_map<u32, ValueMap> goto_vars;
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ValueMap indirect_branch_var;
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ValueMap zero_flag;
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ValueMap sign_flag;
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ValueMap carry_flag;
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ValueMap overflow_flag;
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};
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IR::Opcode UndefOpcode(IR::Reg) noexcept {
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return IR::Opcode::UndefU32;
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}
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IR::Opcode UndefOpcode(IR::Pred) noexcept {
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return IR::Opcode::UndefU1;
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}
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IR::Opcode UndefOpcode(const FlagTag&) noexcept {
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return IR::Opcode::UndefU1;
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}
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IR::Opcode UndefOpcode(IndirectBranchVariable) noexcept {
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return IR::Opcode::UndefU32;
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}
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[[nodiscard]] bool IsPhi(const IR::Inst& inst) noexcept {
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return inst.Opcode() == IR::Opcode::Phi;
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}
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2021-04-05 18:10:55 -04:00
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enum class Status {
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Start,
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SetValue,
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PreparePhiArgument,
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PushPhiArgument,
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};
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template <typename Type>
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struct ReadState {
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ReadState(IR::Block* block_) : block{block_} {}
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ReadState() = default;
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IR::Block* block{};
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IR::Value result{};
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IR::Inst* phi{};
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IR::Block* const* pred_it{};
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IR::Block* const* pred_end{};
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Status pc{Status::Start};
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};
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class Pass {
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public:
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template <typename Type>
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void WriteVariable(Type variable, IR::Block* block, const IR::Value& value) {
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current_def[variable].insert_or_assign(block, value);
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}
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template <typename Type>
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IR::Value ReadVariable(Type variable, IR::Block* root_block) {
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boost::container::small_vector<ReadState<Type>, 64> stack{
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ReadState<Type>(nullptr),
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ReadState<Type>(root_block),
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};
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const auto prepare_phi_operand{[&] {
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if (stack.back().pred_it == stack.back().pred_end) {
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IR::Inst* const phi{stack.back().phi};
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IR::Block* const block{stack.back().block};
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const IR::Value result{TryRemoveTrivialPhi(*phi, block, UndefOpcode(variable))};
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stack.pop_back();
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stack.back().result = result;
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WriteVariable(variable, block, result);
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} else {
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IR::Block* const imm_pred{*stack.back().pred_it};
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stack.back().pc = Status::PushPhiArgument;
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stack.emplace_back(imm_pred);
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}
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}};
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do {
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IR::Block* const block{stack.back().block};
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switch (stack.back().pc) {
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case Status::Start: {
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const ValueMap& def{current_def[variable]};
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if (const auto it{def.find(block)}; it != def.end()) {
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stack.back().result = it->second;
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} else if (!sealed_blocks.contains(block)) {
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// Incomplete CFG
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IR::Inst* phi{&*block->PrependNewInst(block->begin(), IR::Opcode::Phi)};
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incomplete_phis[block].insert_or_assign(variable, phi);
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stack.back().result = IR::Value{&*phi};
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} else if (const std::span imm_preds{block->ImmediatePredecessors()};
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imm_preds.size() == 1) {
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// Optimize the common case of one predecessor: no phi needed
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stack.back().pc = Status::SetValue;
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stack.emplace_back(imm_preds.front());
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break;
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} else {
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// Break potential cycles with operandless phi
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IR::Inst* const phi{&*block->PrependNewInst(block->begin(), IR::Opcode::Phi)};
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WriteVariable(variable, block, IR::Value{phi});
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stack.back().phi = phi;
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stack.back().pred_it = imm_preds.data();
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stack.back().pred_end = imm_preds.data() + imm_preds.size();
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prepare_phi_operand();
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break;
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}
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}
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[[fallthrough]];
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case Status::SetValue: {
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const IR::Value result{stack.back().result};
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WriteVariable(variable, block, result);
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stack.pop_back();
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stack.back().result = result;
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break;
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}
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case Status::PushPhiArgument: {
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IR::Inst* const phi{stack.back().phi};
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phi->AddPhiOperand(*stack.back().pred_it, stack.back().result);
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++stack.back().pred_it;
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}
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[[fallthrough]];
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case Status::PreparePhiArgument:
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prepare_phi_operand();
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break;
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}
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} while (stack.size() > 1);
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return stack.back().result;
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}
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void SealBlock(IR::Block* block) {
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const auto it{incomplete_phis.find(block)};
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if (it != incomplete_phis.end()) {
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for (auto& [variant, phi] : it->second) {
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std::visit([&](auto& variable) { AddPhiOperands(variable, *phi, block); }, variant);
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}
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}
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sealed_blocks.insert(block);
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}
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private:
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template <typename Type>
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IR::Value AddPhiOperands(Type variable, IR::Inst& phi, IR::Block* block) {
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for (IR::Block* const imm_pred : block->ImmediatePredecessors()) {
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phi.AddPhiOperand(imm_pred, ReadVariable(variable, imm_pred));
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}
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return TryRemoveTrivialPhi(phi, block, UndefOpcode(variable));
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}
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2021-02-06 00:38:22 -05:00
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IR::Value TryRemoveTrivialPhi(IR::Inst& phi, IR::Block* block, IR::Opcode undef_opcode) {
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IR::Value same;
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const size_t num_args{phi.NumArgs()};
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for (size_t arg_index = 0; arg_index < num_args; ++arg_index) {
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const IR::Value& op{phi.Arg(arg_index)};
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if (op.Resolve() == same.Resolve() || op == IR::Value{&phi}) {
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// Unique value or self-reference
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continue;
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}
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if (!same.IsEmpty()) {
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// The phi merges at least two values: not trivial
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return IR::Value{&phi};
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}
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same = op;
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}
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if (same.IsEmpty()) {
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// The phi is unreachable or in the start block
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// First remove the phi node from the block, it will be reinserted
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IR::Block::InstructionList& list{block->Instructions()};
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list.erase(IR::Block::InstructionList::s_iterator_to(phi));
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// Insert an undef instruction after all phi nodes (to keep phi instructions on top)
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const auto first_not_phi{std::ranges::find_if_not(list, IsPhi)};
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same = IR::Value{&*block->PrependNewInst(first_not_phi, undef_opcode)};
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// Insert the phi node after the undef opcode, this will be replaced with an identity
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list.insert(first_not_phi, phi);
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}
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// Reroute all uses of phi to same and remove phi
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phi.ReplaceUsesWith(same);
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// TODO: Try to recursively remove all phi users, which might have become trivial
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return same;
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}
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boost::container::flat_set<IR::Block*> sealed_blocks;
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boost::container::flat_map<IR::Block*, boost::container::flat_map<Variant, IR::Inst*>>
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incomplete_phis;
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DefTable current_def;
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};
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void VisitInst(Pass& pass, IR::Block* block, IR::Inst& inst) {
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switch (inst.Opcode()) {
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case IR::Opcode::SetRegister:
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if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) {
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pass.WriteVariable(reg, block, inst.Arg(1));
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}
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break;
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case IR::Opcode::SetPred:
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if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) {
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pass.WriteVariable(pred, block, inst.Arg(1));
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}
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break;
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case IR::Opcode::SetGotoVariable:
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pass.WriteVariable(GotoVariable{inst.Arg(0).U32()}, block, inst.Arg(1));
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break;
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case IR::Opcode::SetIndirectBranchVariable:
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pass.WriteVariable(IndirectBranchVariable{}, block, inst.Arg(0));
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break;
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2021-02-13 23:24:32 -05:00
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case IR::Opcode::SetZFlag:
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pass.WriteVariable(ZeroFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetSFlag:
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pass.WriteVariable(SignFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetCFlag:
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pass.WriteVariable(CarryFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetOFlag:
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pass.WriteVariable(OverflowFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::GetRegister:
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if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) {
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(reg, block));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case IR::Opcode::GetPred:
|
|
|
|
if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) {
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(pred, block));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case IR::Opcode::GetGotoVariable:
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(GotoVariable{inst.Arg(0).U32()}, block));
|
|
|
|
break;
|
2021-03-27 17:30:24 -04:00
|
|
|
case IR::Opcode::GetIndirectBranchVariable:
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(IndirectBranchVariable{}, block));
|
|
|
|
break;
|
2021-02-13 23:24:32 -05:00
|
|
|
case IR::Opcode::GetZFlag:
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(ZeroFlagTag{}, block));
|
|
|
|
break;
|
|
|
|
case IR::Opcode::GetSFlag:
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(SignFlagTag{}, block));
|
|
|
|
break;
|
|
|
|
case IR::Opcode::GetCFlag:
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(CarryFlagTag{}, block));
|
|
|
|
break;
|
|
|
|
case IR::Opcode::GetOFlag:
|
|
|
|
inst.ReplaceUsesWith(pass.ReadVariable(OverflowFlagTag{}, block));
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2021-02-14 18:15:42 -05:00
|
|
|
|
|
|
|
void VisitBlock(Pass& pass, IR::Block* block) {
|
|
|
|
for (IR::Inst& inst : block->Instructions()) {
|
|
|
|
VisitInst(pass, block, inst);
|
|
|
|
}
|
|
|
|
pass.SealBlock(block);
|
|
|
|
}
|
2021-02-02 19:07:00 -05:00
|
|
|
} // Anonymous namespace
|
|
|
|
|
2021-03-14 01:41:05 -05:00
|
|
|
void SsaRewritePass(IR::Program& program) {
|
2021-02-02 19:07:00 -05:00
|
|
|
Pass pass;
|
2021-03-14 01:41:05 -05:00
|
|
|
for (IR::Block* const block : program.post_order_blocks | std::views::reverse) {
|
2021-02-14 18:15:42 -05:00
|
|
|
VisitBlock(pass, block);
|
2021-02-02 19:07:00 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
} // namespace Shader::Optimization
|